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Design Verification Engineer V

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L&T Technology Services Limited

2021-12-03 08:50:19

Job location Menlo Park, California, United States

Job type: fulltime

Job industry: Other

Job description

Job title: Verification Engineer V

Location: Austin TX /Menlo Park CA /Redmond WA(Remote)

Duration: Full time (Permanent)


Description

Design verification engineer with considerable CPU knowledge. Participate in defining UVM infrastructure for the entire family of core IPs. Capable of rapidly deploying UVM environments from clean sheet. Equally capable at pre-silicon verification as well as in post-silicon / emulation. Work with designer to transition any unit-level work from design to verification. Should possess strong interpersonal skills and be capable of solving technical conflicts in a constructive manner.


Must Haves

CPU verification experience

UVM

SystemVerilog, Python

ARMv7, ARMv8, RISC-V experience


Nice to haves

Performance verification


Interview process

Phone Screen w/ Coder Pad Test in C


Education

BSEE, BCSE, BSCE or higher

Some industry experience mandatory (internship exp. if recently graduated)


Must have :Experience w/ SOC chips for CPU's

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