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Verification Engineer V

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Russell Tobin

2021-12-04 07:30:03

Job location Sunnyvale, California, United States

Job type: fulltime

Job industry: HR / Recruitment

Job description

Job Title : Verification Engineer V

Location : Sunnyvale, CA

Duration: 12 Months

Job Description:

The Facebook Reality Labs team is building products that make it easier for people to connect with the ones they love most. We are a team of world-class experts developing and shipping products at the intersection of silicon, hardware, software, and content. Client seeks a Silicon Validation Engineer.

  • As a Silicon Validation Engineer, you will be part of the client's Silicon Validation team validating high performance silicon and leading the effort to ensure high-quality silicon delivery.
  • Silicon Validation Engineer Responsibilities
  • Responsible for SoC and E2E system validation plan development, execution and sign-off
  • Identify and communicate technical risks related to the project to the stakeholders
  • Plan, organize, and oversee silicon bring-up and validation activities across multiple SoCs
  • Understands system HW/SW/FW component as a whole and drives test execution and debug with cross functional teams
  • Lead lab debug, silicon bug repro, failure analysis, and failure report activities
  • Work with cross-functional teams (i.e. architecture, IP, FW, EE, SoC, and product engineer teams) to generate validation reports for SoC and systems
  • Able to work in an agile environment, changing roadmaps and be able to adapt validation plans based on changes

Minimum Qualifications

  • Master's degree in Computer Engineering or Electrical Engineering
  • 7+ years of hands-on experience in bring-up and validation of complex SoCs
  • Problem solving, debug, and whiteboard skills
  • Experience influencing design, DV and Post-Silicon validation teams to optimize the usage of Pre-Silicon Prototype platforms
  • 3+ years of experience in leading silicon validation planning, execution, validation FW development, and validation signoff
  • Solid background in high-speed protocols (i.e. MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up
  • Experience in building silicon validation infrastructure and test automation
  • Hands-on experience in using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc.
  • Experience working in a cross functional and cross site team environment are essential

Preferred Qualifications

  • Knowledge of ASIC design flow, silicon foundry test flow, and silicon FW development process
  • Knowledge and experience in pre-silicon validation platforms (i.e. FPGA and emulation)

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